Gauss Stack – Dielectric Stress Analysis
Dielectric Failure During Reflow
One of the most common failure modes in PCBs is that of the dielectric prepregs and cores not surviving reflow. This failure mechanism is one of overstress – high stress in the dielectric layers can result in delamination due to the shear stress or rupture due to significant misfit strain. Basically, because the PCB is subjected to very high thermal load during reflow (which is typically carried out at 230 °C, 245 °C, or 260 °C), this is the stage where dielectric layers are most likely to fail.Â
Dielectric Stress Prediction in Gauss Stack
Gauss Stack predicts dielectric stress in both x and y directions for each dielectric layer in a stackup, giving a user the ability to see which layers, if any, are at elevated risk for failure. This is especially important when working with hybrid boards, as the bond strength between dissimilar materials is greatly reduced. By allowing you to assess this, you can plan and modify your stackup so as to minimize your failure risk by putting together a stackup that exhibits low stress in all layers.
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